The present invention relates to a semiconductor memory device.
In recent years, a phase-change memory using a chalcogenide material as a recording material is actively studied. A phase-change memory is a type of a resistance-change memory to store information by using a recording material having different resistance states between electrodes.
A phase-change memory stores information by using the fact that the resistance value of a phase-change material such as Ge2Sb2Te5 varies between an amorphous state and a crystal state. Resistance is high in an amorphous state and low in a crystal state. Consequently, readout is carried out by giving a potential difference to both the terminals of an element, measuring an electric current flowing in the element, and judging whether the element is in a high resistance state or in a low resistance state.
In a phase-change memory, data are rewritten by changing the electric resistance of a phase-change film into a different state by Joule heat generated by electric current. Reset operation, namely operation of changing the phase-change film into an amorphous state of a high resistance, is carried out by dissolving a phase-change material by flowing a large current for a short period of time and thereafter rapidly cooling the phase-change material by rapidly reducing the electric current. Meanwhile, set operation, namely operation of changing the phase-change film into a crystal state of a low resistance, is carried out by flowing an electric current enough to retain a phase-change material at a crystallization temperature for a long period of time. Such a phase-change memory can reduce an electric current required for changing the state of a phase-change film as miniaturization advances and hence is suitable for miniaturization in principle. For the reason, such a phase-change memory is actively studied.
As a method for highly integrating a memory using such a resistance-change element, a configuration of: forming a plurality of through-holes penetrating all layers in a laminated structure formed by stacking a plurality of gate electrode materials and a plurality of insulation films alternately through a batch process; and forming and processing a gate insulation film, a channel layer, and a phase-change film inside each of the through-holes is disclosed in Japanese unexamined Patent Application Publication No. 2008-160004.
Meanwhile, although it is a document not on a phase-change memory but on an NAND flash memory, a technology of reducing the resistance of a bit line and improving performance by implanting ions with a mask so that a selective transistor may be an enhancement type or a depression type and bundling metal wires is disclosed in Japanese Unexamined Patent Application Publication No. 2008-192708.